Power semiconductor elements may include, for example, IGBT (Insulated Gate Bipolar Transistor), power MOSTFET (Metal Oxide Semiconductor Field Effect Transistor), MOSGTO (MOS Gate Turn-off Thyristor) and the like. Further, an Intelligent Power Module (hereinafter referred to as an IPM) may include a power semiconductor circuit integrating these power semiconductor elements and a power semiconductor drive circuit for controlling gates of the power semiconductor elements, and circuit devices other than the power semiconductor circuit, which are packaged in a single package.
FIG. 11 schematically shows a power semiconductor drive circuit, a power semiconductor circuit and a power module circuit device. As shown in FIG. 11, drains D of transistors M2 and M3 are connected in common and this common connection point is connected to a node HO and a gate G of a transistor PT1. Gates G of transistors M2 and M3 are connected in common and an upper input signal HIN is applied to these common gates G via an upper driver UD. A power supply voltage VBB is applied to a source S of the transistor M2 via an external terminal VB. The power supply voltage VBB is a power supply voltage VCC supplied to an external terminal VC and a boost voltage generated in a bootstrap circuit BS. A source of the transistor M3 is connected to a node VS.
The transistor PT1 is referred to as an upper power transistor and a power supply voltage VPP is applied to a drain D of the transistor PT1 via an external terminal P. The gate G of the transistor PT1 is connected to the node HO. A source S of the transistor PT1 is connected to the node VS. A diode for free-wheeling (shown without a reference sign) is connected between the drain D and the source S of the transistor PT1.
A transistor PT2 is generally referred to as a lower power transistor and is fabricated on a separate semiconductor substrate from the transistor PT1 referred to as the upper power transistor. A wire LW made of material such as aluminum or copper is used as a connector for connecting the transistor PT1 and the transistor PT2. The wire LW has a first end connected to the node VS and a second end connected to an output terminal OUT and a drain D of the transistor PT2. The wire LW has an inductance component lw.
The drain D of the transistor PT2 is connected to the output terminal OUT, a source S of the transistor PT2 is connected to a ground electric potential GND via an external terminal N, and a lower input signal LIN is applied to a gate G of the transistor PT2. A diode for free-wheeling (shown without a reference sign) is connected between the drain D and the source S of the transistor PT2, like the transistor PT1. The transistor PT2 is turned on/off complementarily with the transistor PT1. That is, the transistor PT1 is OFF when the transistor PT2 is ON, and the transistor PT1 is ON when the transistor PT2 is OFF.
A capacitor CB for bootstrap is connected between the external terminal VC and the external terminal OUT. The external terminal OUT is connected to an external load. As the external load, an inductor L1 is shown. The inductor L1 directly indicates an inductor, for example, employed for a switching regulator, a motor winding, and a three-phase winding used for an inverter.
In the power semiconductor drive circuit and the like shown in FIG. 11, if a switching speed of the transistor PT1 is high, problems may occur where a transient voltage ΔV is generated by the inductance component lw of the wire LW and the transistors M2 and M3 deteriorate or are destroyed. In addition, if a switching speed of the transistor PT2 is high, gate capacitances Crss and Ciss of the transistor PT1 are charged and a gate voltage of the transistor PT1 exceeds a threshold voltage Vth of the transistor PT1. Accordingly, the transistor PT1 which should be originally placed in an OFF state is self-turned on and a through-current flows between the transistor PT1 and the transistor PT2, which may result in a problem of deterioration of the transistors PT1 and PT2. In addition, without leading to the deterioration, power may be wastefully consumed, which may result in difficulty in achieving power saving.
As a first solution to solve the above problems, the driving ability of a voltage-driven element may be lowered by changing a switching element of a parallel circuit when a gate voltage at the time of turning-on reaches a mirror voltage.
A second solution may include detecting a change in gate voltage by a comparing circuit and changing gate resistance based on the detection.
As a third solution to realize the compatibility of EMI noise suppression and switching loss suppression at low costs, a power device control circuit may employ a time constant circuit composed of a resistive element and a capacitor, as a timer circuit so as to equalize periods taken for a gate voltage to reach a mirror voltage.
However, the first solution still has a risk of a breakdown of a gate driver due to a surge or a transient voltage generated according to an operation of switching from an ON state to an OFF state.
The second solution requires a relatively complicated timer circuit for detecting a timing at which an element at a high electric potential side is switched from OFF to ON or from ON to OFF, and setting a predetermined voltage based on this detection.
Although the third solution suppresses the EMI noise, it cannot expect to suppress breakdown of a power semiconductor drive circuit and switching loss of a power semiconductor.